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[VHDL-FPGA-Verilog] myUART

Description: 这是我用Xilinx公司的sparten3开发板,ISE集成开发环境，用VHDL语言开发的串口全双工通信程序，供大家参考，共同学习。-This is the company I used the sparten3 Xilinx development boards, ISE Integrated Development Environment, Using VHDL development of the full-duplex serial communication program, for your reference, learning together.
Platform: | Size: 657408 | Author: 汪莉莉 | Hits:

[VHDL-FPGA-Verilog] ISE8.1_loopback

Description: 硬件平台为Xilinx Spartan3e，编译软件为ISE8.1，实现了九针com口通信，键盘输入回显，switch控制LED功能。-hardware platform for Xilinx Spartan3e, compile software ISE8.1. achieved nine needles com port communication, a return to the keyboard input, LED control switch function.
Platform: | Size: 23552 | Author: Lincker | Hits:

[Embeded-SCM Develop] Xinlinx_ISE_study

Description: 用中文介绍Xilinx公司FPGA/CPLD的集成开发环境－ISE软件的简单使用 -Introduction to Chinese Xilinx Inc. FPGA/CPLD integrated development environment-ISE software simple to use
Platform: | Size: 825344 | Author: Kuben | Hits:

[VHDL-FPGA-Verilog] sn

Description: 附件为xilinx ISE9.2的安装序列号和MAX_II_board_schematics原理图，请需要的朋友下载，-Xilinx ISE9.2 annex for the installation serial number and MAX_II_board_schematics schematics, please download the Friend in need,
Platform: | Size: 240640 | Author: 磊 | Hits:

[Books] XilinxISE6[1]_1ichinese

Description: ise6.1的中文说明，能够在较短的时间内熟悉ise-ise6.1 the Chinese that in a short period of time are familiar with ise
Platform: | Size: 825344 | Author: yugaoshang | Hits:

[ARM-PowerPC-ColdFire-MIPS] CPLD

Description: 在文件夹YL2440_CPLD中有做好的CPLD工程,请用Xilinx ISE 6.2打开.-In the folder have to do a good job YL2440_CPLD the CPLD project, please open the Xilinx ISE 6.2.
Platform: | Size: 686080 | Author: gaofeng | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA设计全流程：Modelsim>>Synplify.Pro>>ISE 第一章 Modelsim编译Xilinx库 第二章 调用Xilinx CORE-Generator 第三章 使用Synplify.Pro综合HDL和内核 第四章 综合后的项目执行 第五章 不同类型结构的仿真-FPGA design of the whole process: Modelsim>> Synplify.Pro>> ISE Chapter ModelSim Xilinx compiler library chapter called Xilinx CORE-Generator Chapter III Synplify.Pro integrated use of Chapter IV of HDL and kernel integrated implementation of the project after the Chapter V structure of different types of simulation
Platform: | Size: 218112 | Author: 青岚之风 | Hits:

[VHDL-FPGA-Verilog] clock

Description: 自己编写的一个verilog时钟程序，在xilinx的ISE仿真通过-I have written a Verilog clock procedures, in Xilinx s ISE simulation through
Platform: | Size: 327680 | Author: lg | Hits:

[VHDL-FPGA-Verilog] task_function

Description: 自己编写的一个verilog HDL小程序，实现基本的task调用function的功能，对初学者有用。在xilinx的ISE仿真调试通过-I have written a verilog HDL small procedures, to achieve the basic function of the task to call the function, useful for beginners. In Xilinx s ISE simulation debugging through
Platform: | Size: 235520 | Author: lg | Hits:

[VHDL-FPGA-Verilog] PPT_timing-constraint

Description: PPT的形式演示Xilinx-ISE环境下时序约束的实现个结果
Platform: | Size: 615424 | Author: joan | Hits:

[VHDL-FPGA-Verilog] CPLDexperiment

Description: 本实验教程选用Xilinx公司的产品X9572，与之配套的开发软件为ISE4.1i，可进行原理图的输入和VHDL硬件描述语言的输入，并且可利用Modelsim进行功能仿真和时序仿真。-In this study, selected Xilinx tutorial products X9572, with supporting the development of software for ISE4.1i, schematic can be input and VHDL hardware description language input, and can use Modelsim functional simulation and timing simulation.
Platform: | Size: 584704 | Author: bin | Hits:

[VHDL-FPGA-Verilog] I2C

Description: I2C 串口通讯Xilinx项目源码 拷贝到硬盘，用ISE打开工程文件即可。-I2C Serial Communication Xilinx source project are copied to the hard drive, using ISE project file can be opened.
Platform: | Size: 212992 | Author: 沈志 | Hits:

[Embeded-SCM Develop] XilinxISE9.X

Description: 该源码为xilinx ise教程的附带光盘源码，可供广大初学者使用-The source for the xilinx ise Tutorial CD-ROM attached to the source for the broad masses of beginners
Platform: | Size: 8306688 | Author: 张晨 | Hits:

[Other Embeded program] xup_v2pro

Description: Xilinx ISE&EDK 8.2平台的快速点餐系统设计-Xilinx ISE
Platform: | Size: 993280 | Author: huosijia | Hits:

[Other Embeded program] Face_Detect

Description: Xilinx ISE&EDK 8.2平台的人脸检测系统设计-Xilinx ISE
Platform: | Size: 284672 | Author: huosijia | Hits:

[VHDL-FPGA-Verilog] DUC

Description: 基于XILINX ISE下的数字上变频设计，其中用到了XILINX的乘法IP。已经通过工程实用，好用。-XILINX ISE based on frequency of figure design, use one of the XILINX multiplication IP. Has passed the project practical, easy to use.
Platform: | Size: 18432 | Author: 咚咚 | Hits:

[DSP program] EMIF_COM

Description: 实现FPGA与DSP之间通信的接口,利用DSP的标准EMIF接口-the interface for TI DSP and Xilinx s FPGAs
Platform: | Size: 1147904 | Author: 贺冲 | Hits:

[Software Engineering] ISE

Description: 是ISE的中文教程，主要是对初学者演示和展示在XILINX的ISE集成软件环境下，如何用VHDL和原理图的方式进行设计输入，用MOdelsim方针。-ISE is a Chinese course is mainly for beginners and display presentation of the ISE in XILINX Integrated Software environment, how to use VHDL and schematic design entry way, with the principle of MOdelsim.
Platform: | Size: 934912 | Author: 谢斌斌 | Hits:

[VHDL-FPGA-Verilog] ise9.1

Description: 学习ISE的好资料，想要使用XILINX芯片进行开发必看-ISE learning good information, want to use a must-see XILINX chip development
Platform: | Size: 26989568 | Author: 李鹏 | Hits:

[VHDL-FPGA-Verilog] ddc_FPGA

Description: 简要介绍了数字下变频的设计，通过采用xilinx的ise软件，ipcore的调用实现-Briefly introduced the design of digital down conversion, through the use of ise the xilinx software, ipcore call the realization of
Platform: | Size: 2578432 | Author: 望天 | Hits:
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